Fujitsu FR60 Hardware Manual page 453

Note:
The MB91F353A/351A/352A/353A do not have OCS45 and OCS67.
[Bits 15 to 13] Unused bits
"1" is always read from these bits.
[bit 12] CMOD
CMOD is used to switch the pin output level reverse mode upon a comparison match while pin output is
enabled (OTE1=0 or OTE0=1:PFR0).
When CMOD=0 (initial value), the output level of the pin corresponding to the compare register is
reversed.
• OC0:
The level is reversed upon a match with compare register 0.
• OC1:
The level is reversed upon a match with compare register 1.
When CMOD=1, the output level is reversed for the compare register 0 in the same manner as for
CMOD=0. The output level of the pin corresponding to compare register 1 (OC1), however, is reversed
upon a match with compare register 0 or 1.
If compare registers 0 and 1 have the same value, the same operation as with a single compare register
is performed.
• OC0:
The level is reversed upon a match with compare register 0.
• OC1:
The level is reversed upon a match with compare register 0 or 1.
[Bits 11 and 10] Unused bits
"1" is always read from these bits.
[bits 9 and 8] OTD1 and OTD0
These bits are used to change the pin output level when the output compare register pin output is
enabled. The initial value of the compare pin output is "0". Ensure that the compare operation is stopped
before a value is written. When read, these bits indicate the output compare pin output value.
OTD1 or OTD0
OTD1: Corresponds to output compare 1.
OTD0: Corresponds to output compare 0.
0 Sets "0" for the compare pin output. (initial value)
1 Sets "1" for the compare pin output.
Compare pin output level
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