Fujitsu FR60 Hardware Manual page 301

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[Bit 2] CLR
This bit is used to initialize the value of the 16-bit free-running timer to 0000
Writing "1" to the CLR bit initializes the counter to 0000
Writing "0" to the CLR bit is ignored. The value read from the CLR bit is always 0.
CLR
Note:
The counter value is initialized at the exact point at which the count value changes. To initialize the
counter while the 16-bit free-running timer is stopped, write 0000
[Bits 1 and 0] CLK1 and CLK0
These bits are used to select the count clock for the 16-bit free-running timer.
Because the count clock is changed immediately after a value is written to the CLK1 and CLK0 bits, the
value of these bits must be changed while the output compare and input capture operations are stopped.
CLK1
0
0
1
1
Φ: Machine clock
0
Invalid (initial value)
1
Initialization of counter value to 0000
Count
CLK0
clock
Φ/4
0
Φ/16
1
Φ/32
0
Φ/64
1
.
H
Flag meaning
H
Φ=25MHz
Φ=12.5MHz
160ns
320ns
640ns
1.28µs
1.28µs
2.56µs
2.56µs
5.12µs
during timer operation.
H
to the data register.
H
Φ=6.25MHz
Φ=3.125MHz
640ns
1.28µs
2.56µs
5.12µs
5.12µs
10.24µs
10.24µs
20.48µs
283

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