Fujitsu FR60 Hardware Manual page 546

CHAPTER 16 DMA CONTROLLER (DMAC)
MB91xxx
Read cycle
I-bus
D-bus
528
Figure 16.5-8 Fly-by Transfer (I/O → Memory)
Fly-by transfer (I/O to memory)
DMAC
X-bus
Bus controller
Data buffer
F-bus
RAM I/O
Fly-by transfer by SDRAM disabled
Memory write by WR or CSx
I/O read by WR or DACK