•
Fly-by transfer by DMA can be performed.
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Transfer between memory and I/O can be performed in a single access operation.
•
The memory wait cycle can be synchronized with the I/O wait cycle in fly-by.
•
The hold time can be secured by only extending transfer source access.
•
Idle/recovery cycles specific to fly-by transfer can be set.
•
External bus arbitration using BRQ and BGRNT can be performed.
•
Pins that are not used by the external interface can be used as general-purpose I/O ports through
settings.
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