Main Clock Oscillation Stabilization Wait Timer - Fujitsu FR60 Hardware Manual

3.13

Main Clock Oscillation Stabilization Wait Timer

The main clock oscillation stabilization wait timer is a 23-bit counter that performs
incremental counting in synchronization with the main clock. The main clock oscillation
stabilization wait timer has an interval timer function to generate interrupts repeatedly
at fixed time intervals.
This timer is used to secure main clock oscillation stabilization wait time when main
clock oscillation is restarted after it has been stopped by setting Bit 0 (OSCDS1) of the
oscillation control register (OSCCR) during operation with the subclock.
■ Time Intervals for Main Clock Oscillation Stabilization Wait Timer
Table 3.13-1 lists the types of time intervals. Select a time interval from one of the following three types
for timer intervals.
Table 3.13-1 Time Intervals for Main Clock Oscillation Stabilization Wait Timer
1/F (about 80 ns)
CL
Note: F
CL
■ Block Diagram of the Main Clock Oscillation Stabilization Wait Timer
Figure 3.13-1 shows the block diagram of the main clock oscillation stabilization wait timer.
Figure 3.13-1 Block Diagram of the Main Clock Oscillation Stabilization Wait Timer
Main clock oscillation
stabilization wait
timer counter
Main clock oscillation
stabilization wait
timer interrupt
Main clock oscillation
stabilization wait timer
control register (OSCR)
Main clock source oscillation
F :
CL
The numbers in the parentheses indicate the intervals
when the
Main clock interval
indicates the main clock oscillation frequency.
0 1
1 2
2 2
F
C L
WIF
main clock source oscillation is 12.5 Hz.
Interval time
11 (164 µs)
2 /F
CL
16
2 /F (5.25 ms)
CL
23
2 /F (671 ms)
CL
2 3 4 5 6 7 8
3 4 5 6 7 8 9
2 2 2 2 2 2 2
(164µs)
Interval
timer
selector
Reset
(INIT)
WIE WEN
10 15 22
1 1 1 6
2 3
2 2
2
(5.25ms)
(671ms)
Counter
clear circuit
WS0 WCL
WS1
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