Explanation Of Operation - Fujitsu FR60 Hardware Manual

CHAPTER 16 DMA CONTROLLER (DMAC)
16.3

Explanation of Operation

This section provides an overview of DMAC operation. It also provides details of
transfer request settings and transfer sequences and operational details.
■ Overview of DMAC
The DMAC block is a multifunctional DMA controller that controls high-speed data transfer without the
use of CPU instructions. It is built into all FR family devices.
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