Fujitsu FR60 Hardware Manual page 634

APPENDIX
Table D-18 32-Bit Delayed Branch Macro Instructions
Mnemonic
*CALL32:D label32,Ri
*BRA32:D label32,Ri
*BEQ32:D label32,Ri
*BNE32:D label32,Ri
*BC32:D label32,Ri
*BNC32:D label32,Ri
*BN32:D label32,Ri
*BP32:D label32,Ri
*BV32:D label32,Ri
*BNV32:D label32,Ri
*BLT32:D label32,Ri
*BGE32:D label32,Ri
*BLE32:D label32,Ri
*BGT32:D label32,Ri
*BLS32:D label32,Ri
*BHI32:D label32,Ri
References :
1. CALL32:D
(1) If label32-PC-2 is between -0x800 and +0x7fe, create an instruction as shown below:
CALL:D label12
(2) If label32-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
LDI:32 #label32,Ri
CALL:D @Ri
2 BRA32:D
2. BRA32:D
(1) If label32-PC-2 is between -0x100 and +0xfe, create an instruction as shown below:
BRA:D label9
(2) If label32-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
LDI:32 #label32,Ri
JMP:D @Ri
3 Bcc32:D
3. Bcc32:D
(1) If label32-PC-2 is between -0x100 and +0xfe, create an instruction as shown below:
Bcc:D label9
(2) If label32-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
Bxcc false xcc is the opposite condition of cc.
LDI:32 #label32,Ri
JMP:D @Ri32
false:
616
Operation
Address of the next instruction
→
label20 PC
→
label32 PC
→
if(Z==1) then label20 PC
↑
s/Z==0
↑
s/C==1
↑
s/C==0
↑
s/N==1
↑
s/N==0
↑
s/V==1
↑
s/V==0
↑
s/V xor N==1
↑
s/V xor N==0
↑
s/(V xor N) or Z==1
↑
s/(V xor N) or Z==0
↑
s/C or Z==1
↑
s/C or Z==0
→
Ri: Temporary register (See Reference 1)
RP,
Ri: Temporary register (See Reference 2)
Ri: Temporary register (See Reference 3)
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Remarks