Fujitsu FR60 Hardware Manual page 549

Hide thumbs Also See for FR60:

Table of Contents

Figure 16.6-4 DREQx Edge Request (2-Cycle Transfer)

Figure 16.6-5 DREQx Level Request (2-Cycle Transfer)

In these cases, the transfer source/destination for 2-cycle transfer is the external area. Therefore, to stop at

the second DMA transfer, negate after the fall of #RD2 but before the final MCLK rise of #WR2.

3 cycles or more

Next request after DEOP output

Sensing point of 3rd transfer request

Mb91350a series