Fujitsu FR60 Hardware Manual page 451

■ Block Diagram of the Output Compare Module
Figure 14.4-1 shows a block diagram of the output compare module.
(Only the compare register for channel 0
is used as the free-running timer clear
register.)
Compare register
Compare circuit
Compare register
Compare circuit
16-bit free-running timer
Figure 14.4-1 Block Diagram of the Output Compare Module
CMOD
CST1
CST0
ICP1
OTD1 OTD0
Compare
OTE0,2,4,6
output latch
OTE0 to OTE7
are located in PFR0.
Compare
OTE1,3,5,7
output latch
ICP0 ICE1 ICE0
Output
(channels 0, 2, 4, and 6)
Output
(channels 1, 3, 5, and 7)
Interrupt output
Interrupt output
433