Overview Of Dtp/External Interrupt - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 18 DTP/EXTERNAL INTERRUPT
18.1

Overview of DTP/External Interrupt

The DTP (Data Transfer Peripheral) is located between peripherals existing out of the
2
device and the F MC-16LX CPU. It is the peripheral control section that receives a DMA
request or an interrupt request generated by the external peripheral, reports it to the
2 MC-16LX CPU, and starts the µDMAC or the interrupt processing.
F
Overview of DTP/External Interrupt
Two types, "H" and "L" can be selected as the request level for µDMAC. Four types in total, the rising
edge and falling edge in addition to "H" and "L" can be selected for an external interrupt request.
Block Diagram of DTP/External Interrupt
Figure 18.1-1 shows the block diagram of DTP/external interrupt.
2
F MC-16 bus
4
4
4
8
422
Figure 18.1-1 Block Diagram of DTP/External Interrupt
DTP/Interrupt enable register
Gate Factor F/F
DTP/Interrupt factor register
Request level setting register
4
Edge detection
circuit
Request input