Overview Of Dtp/External Interrupt Circuit; Table 16-1 Overview Of Dtp/External Interrupt - Fujitsu MB90420/5 (A) Series Hardware Manual

F2mc-16lx family 16-bit microcontrollers
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This chapter explains the functions and operation of DTP/external interrupt circuit.

16.1 Overview of DTP/External Interrupt Circuit

A DTP (Data Transfer Peripheral)/external interrupt circuit is existed between externally connected
peripheral unit and the CPU of F
request or data transfer request generated by the peripheral unit to the CPU to issue the external interrupt
request or start the expansion intelligent I/O service (EI
n n DTP/External interrupt function
The DTP/external interrupt function is started by the signal input to the DTP/external interrupt pin. The factor
in this start is accepted by the CPU in the same manner as an ordinary hardware interrupt to generate the
external interrupt or start the EI
When the corresponding EI
external interrupt function operates, causing a branch to the interrupt routine. When the EI
enabled, the DTP function operates, automatically transfers the data by EI
processing routine after the specified number of times for data transfer. Table 16-1 shows an overview of
the DTP/external interrupt.
Input pins
Interrupt factor
Interrupt No.
Interrupt control
Interrupt flag
Processing selection
Processing contents
ICR: Interrupt control register
DTP/EXTERNAL INTERRUPT CIRCUIT
2
MC-16LX.
2
OS.
2
OS is already disabled when the interrupt request is accepted by the CPU, the

Table 16-1 Overview of DTP/External Interrupt

External Interrupt
8 pins (P50/INT0 to P53/INT3, P00/INT4 to P03/INT7)
The to-be-detected level/edge is selected in pin units by using the request level setting
register (ELVR).
Input of H level, L level, rising edge, or
falling edge
#16 (10
) to #26 (1A
)
H
H
The interrupt request output is enabled/disabled using the DTP/interrupt enable register
(ENIR).
The interrupt factor is held using the DTP/interrupt factor register (EIRR).
2
The EI
OS is disabled. (ICR: ISE = 0)
A branch is caused to the external interrupt-
processing routine.
DTP/external interrupt circuit communicates the interrupt
2
OS).
Input of H level or L level
The EI
The EI
completes the specified number of timer for
data transfers, causing a branch to the
interrupt routine.
16-3
2
OS is already
2
OS and branches to the interrupt-
DTP Function
2
OS is enabled. (ICR: ISE = 0)
2
OS performs auto data transfer and

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