Fujitsu FR60 Hardware Manual page 11
Hide thumbs
Also See for FR60:
- Hardware manual (636 pages) ,
- User manual (104 pages) ,
- User manual (26 pages)
Table of Contents
Advertisement
6.1.1
Overview of 8/16-bit Up/Down Counters/Timers ....................................................................... 247
6.1.2
8/16-bit Up/Down Counters/Timer Registers ............................................................................. 252
6.1.3
Operation of the 8/16-bit Up/Down Counters/Timers ................................................................ 259
6.2
U-TIMER ......................................................................................................................................... 268
6.2.1
Overview of the U-TIMER .......................................................................................................... 269
6.2.2
U-TIMER Registers ................................................................................................................... 270
6.2.3
Operation of the U-TIMER ......................................................................................................... 275
7.1
16-bit Free-Running Timer .............................................................................................................. 278
7.1.1
Structure of the 16-bit Free-Running Timer ............................................................................... 279
7.1.2
16-bit Free-Running Timer Registers ........................................................................................ 280
7.1.3
Operation of the 16-bit Free-Running Timer .............................................................................. 284
7.2
16-bit Reload Timer ........................................................................................................................ 286
7.2.1
Structure of the 16-bit Reload Timer ......................................................................................... 287
7.2.2
16-bit Reload Timer Register ..................................................................................................... 289
7.2.3
Operation of the 16-bit Reload Register .................................................................................... 292
PROGRAMMABLE PULSE GENERATOR (PPG) TIMER ...................... 297
8.1
Overview of the PPG Timer ............................................................................................................ 298
8.2
PPG Timer Registers ...................................................................................................................... 302
8.2.1
Control Status Register ............................................................................................................. 303
8.2.2
PPG Cycle Setting Register (PCSR) ......................................................................................... 307
8.2.3
PPG Duty Setting Register (PDUT) ........................................................................................... 308
8.2.4
PPG Timer Register (PTMR) ..................................................................................................... 309
8.2.5
General Control Register 10 ...................................................................................................... 310
8.2.6
General Control Register 20 ...................................................................................................... 313
8.3
Operation of the PPG Timer ........................................................................................................... 314
8.3.1
Timing Charts for PWM Operation ............................................................................................ 315
8.3.2
Timing Charts for One-Shot Operation ...................................................................................... 317
8.3.3
Interrupt Sources and Timing Chart (with PPG output set for ordinary polarity) ........................ 318
8.3.4
Examples of Methods of All-L and All-H PPG Output ................................................................ 319
8.3.5
Activation of Multiple Channels Using the General Control Register ........................................ 320
INTERRUPT CONTROLLER ................................................................... 323
9.1
Overview of the Interrupt Controller ................................................................................................ 324
9.2
Interrupt Controller Registers .......................................................................................................... 328
9.2.1
Interrupt Control Register (ICR) ................................................................................................. 329
9.2.2
Hold request cancellation request register (HRCL) ................................................................... 331
9.3
Operation of the Interrupt Controller ............................................................................................... 332
CHAPTER 10 EXTERNAL INTERRUPT AND NMI CONTROLLER ............................... 341
10.1
Overview of the External Interrupt and NMI Controller ................................................................... 342
10.2
External Interrupt and NMI Controller Registers ............................................................................. 344
10.2.1
Enable Interrupt Request Register (ENIRn) .............................................................................. 345
10.2.2
External Interrupt Request Register (EIRRn) ............................................................................ 346
10.2.3
External Level Register (ELVRn) ............................................................................................... 347
vii
Advertisement
Table of Contents
