Fujitsu FR60 Hardware Manual page 52

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CHAPTER 2 HANDLING THE DEVICE
■ Pull-up Control
The AC specification will not be guaranteed if pull-up resistor is connected to pins that are used as external
bus pins.
In addition, ports for which pull-up resistor is connected will be disabled in stop mode with HIZ = 1 and for
hardware standby.
■ Clock Controller
When inputting the low level to INIT, allocate wait time to allow oscillation to stabilize.
■ Subclock Switching
Immediately after switching the clock source to subclock mode from the main clock, insert at least one
NOP instruction.
■ Bit Search Module
Only word access is supported for the BSD0, BSD1, and BDSC registers.
■ D-bus Memory
Because instruction fetch to the D-bus memory is not executed, do not set the code area in the D-bus
memory.
If instruction fetch to the D-bus memory is executed, incorrect data will be interpreted for the codes,
causing a runaway condition.
■ Low-power Consumption Mode
When sleep or stop mode is set, always read the same registers immediately after writing to the standby
control register (STCR).
Specifically, use the sequence given below.
In addition, after returning from standby mode, set the I flag, ILM, and ICR to branch to the interrupt
handler that causes the return.
34
(ldi
#0x0b, r0)
(ldi
#_CLKR ,r12)
stb
r0, @r12
nop
(ldi
#value_of_standby, r0)
(ldi
#_STCR, r12)
stb
r0, @r12
ldub
@r12, r0
ldub
@r12, r0
nop
nop
nop
nop
nop
// sub-clock mode
// Must insert NOP instruction
// set STOP/SLEEP bit
// Must read STCR
// after reading, go into standby mode
// Must insert NOP * 5

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