Channel Selection And Control - Fujitsu FR60 Hardware Manual

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CHAPTER 16 DMA CONTROLLER (DMAC)
16.3.18

Channel Selection and Control

Up to five channels can be simultaneously set as transfer channels. In general, an
independent function can be set for each channel.
■ Priority Among Channels
Since DMA transfer is possible only on 1 channel at a time, priority must be set for the channels.
Two modes, fixed and rotation, are provided as the priority settings and can be selected for each channel
group (described later).
Fixed mode
The order of priority is fixed by channel number, with priority decreasing from ch0 to ch4:
(ch0 > ch1 > ch2 > ch3 > ch4)
If a transfer request with a higher priority is received during a transfer, the transfer channel becomes the
channel with the higher priority when the transfer for the transfer unit (number set in the block size
specification register x data width) ends.
When higher priority transfer is completed, transfer is restarted on the previous channel.
Figure 16.3-4 shows DMA transfer in fixed mode.
ch0 transfer request
ch1 transfer request
Bus operation
Transfer ch
ch0 transfer end
ch1 transfer end
516
Figure 16.3-4 DMA Transfer in Fixed Mode
CPU
SA
ch1
DA
SA
DA
SA
ch0
ch0
DA
SA
DA
ch1
CPU

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