Fujitsu FR60 Hardware Manual page 41

Table 1.5-1 Pin Functions (11 / 13)
Pin number
176 pins 120 pins
154 -
155 -
156 -
157 -
158 66
159 67
160 68
I/O
Pin name circuit
type
DACK1
C
PB4
DEOP1
DSTP1 C
PB5
IOWR
C
PB6
IORD
C
PB7
CS0
C
PA0
CS1
C
PA1
CS2
C
PA2
Function
[DACK1] is DMA external transfer request acceptance
output.
This function is valid when DMA transfer request
acceptance output is allowed.
[PB4] is a general-purpose I/O port.
This function is valid when DMA external transfer request
acceptance output is not allowed.
[DEOP1] is DMA external transfer end output.
This function is valid when DMA external transfer end
output is allowed.
[DSTP1] is DMA external transfer stop input.
This function is valid when DMA external transfer stop
input is allowed.
[PB5] is a general-purpose I/O port.
This function is valid when DMA external transfer end
output and external transfer stop input are not allowed.
[IOWR] is write strobe output for DMA fly-by transfer.
This function is valid when write strobe output for DMA
fly-by transfer is allowed.
[PB6] is a general-purpose I/O port.
This function is valid when write strobe output for DMA
fly-by transfer is not allowed.
[IORD] is read strobe output for DMA fly-by transfer.
This function is valid when read strobe output for DMA fly-
by transfer is allowed.
[PB7] is a general-purpose I/O port.
This function is valid when read strobe output for DMA fly-
by transfer is not allowed.
[CS0] is chip select 0 output.
This function is valid in external bus mode.
[PA0] is a general-purpose I/O port.
This function is valid in single-chip mode.
[CS1] is chip select 1 output.
This function is valid when chip select 1 output is allowed.
[PA1] is a general-purpose I/O port.
This function is valid when chip select 1 output is not
allowed.
[CS2] is chip select 2 output.
This function is valid when chip select 2 output is allowed.
[PA2] is a general-purpose I/O port.
This function is valid when chip select 2 output is not
allowed.
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