Block Diagram - Fujitsu FR60 Hardware Manual

1.2

Block Diagram

Figure 1.2-1 is a block diagram of the MB91F353A/353A/352A/351A.
Figure 1.2-2 is a block diagram of the MB91355A/354A/F355A/F356B/F357B.
■ MB91F353A/353A/352A/351A Block Diagram
X1
X0,
MD0 to
INIT
X1A
X0A,
INT0 to
NMI
SI0 to
SO0 to
SCK0 to
SI6,
SO6,
SCK6,
AN0
AVRH, AVCC
AVSS, AVRL
DA0 to 1
DAVC, DAVS
ROM/Flash
RAM (Stack)
RAM (Instruction
execution enabled)
Figure 1.2-1 MB91F353A/353A/352A/351A Block Diagram
32
Bit search
Stack RAM
ROM/Flash
RAM
(Instruction execution
32
enabled)
32 16
adapter
Clock
2
control
Watch timer
16
Interrupt
controller
External interrupt
7
(8 channels)
7
UART
7
(4 channels)
7
U-TIMER
(4 channels)
7
7
SIO (2 channels)
7
to 7
A/D (8 channels)
ATG
D/A (2 channels)
MB91F353A
Flash 512K bytes
16K bytes
8K bytes
FR CPU Core
32
DMAC
(5 channels)
Bus converter
External
32
memory
interface
PORT
16-bit PPG
(3 channels)
Reload timer
(4 channels)
Free-running timer
Input capture
(4 channels)
Output compare
(2 channels)
2
I C (1 channel)
Up/down counter
(1 channel)
MB91353A MB91352A
512K bytes 384K bytes
16K bytes 8K bytes
8K bytes 8K bytes
to 00
A20
to 16
D31
RD
WR1, WR0
RDY
BRQ
BGRNT
SYSCLK
PORT
to 4
TRG0
4
PPG0, 2,
FRCK
to 3
IN0
OC0, 2
SDA
SCL
AIN0
BIN0
ZIN0
MB91351A
384K bytes
16K bytes
8K bytes
7