Ppg Duty Setting Register (Pdut) - Fujitsu FR60 Hardware Manual

CHAPTER 8 PROGRAMMABLE PULSE GENERATOR (PPG) TIMER
8.2.3

PPG Duty Setting Register (PDUT)

The PPG duty setting register (PDUT) is a register that has a buffer for setting the duty.
On the MB91F353A/351A/352A/353A, setting of data in the PPG duty setting registers for
ch1, ch3, and ch5 is invalid.
■ Configuration of PPG Duty Setting Register (PDUT)
The configuration of the PPG duty setting register (PDUT) is shown below.
PDUT
Address : ch0 000124
Data transfer from the buffer is performed as a counter borrow operation.
When the same value is set in the cycle setting register and the duty setting register, all-"H" is outputted in
ordinary polarity mode and all-"L" is outputted in reverse polarity mode.
Notes:
• Do not specify a smaller value in PCSR than that in PDUT. Otherwise, PPG output becomes
undefined.
• This register must be accessed using 16-bit data.
308
15 14
bit
H
ch1 00012C
H
7
ch2 000134
H
ch3 00013C
H
ch4 000144
H
ch5 00014C
H
Attribute→ Write only
Initial value→ Undefined
13 12 11
6 5 4 3
10 9 8
2 1 0