Fujitsu FR60 Hardware Manual page 216

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CHAPTER 4 EXTERNAL BUS INTERFACE

■ Little Endian Data Format

Figure 4.4-11 shows the relationship between the internal register and external data bus based on the data

format of word access (when the LD and ST instructions are executed).

Figure 4.4-11 Word Access (When LD and ST Instructions Executed)

Figure 4.4-12 shows the relationship between the internal register and external data bus based on the data

format of halfword access (when the LDUH and STH instructions are executed).

Figure 4.4-12 Halfword Access (When LD and ST Instructions Executed)

Figure 4.4-13 shows the relationship between the internal register and external data bus based on the data

format of byte access (when the LDUB and STB instructions are executed).

Figure 4.4-13 Byte Access (When LDUB and STB Instructions Executed)

a) Output address low-order digits 00

a) Output address low-order digits 00

b) Output address low-order digits 01

b) Output address low-order digits 10

c) Output address low-order digits 10

d) Output address low-order digits 11

Mb91350a series