APPENDIX
Table D-16 20-Bit Delayed Branch Macro Instructions
Mnemonic
*CALL20:D label20,Ri
*BRA20:D label20,Ri
*BEQ20:D label20,Ri
*BNE20:D label20,Ri
*BC20:D label20,Ri
*BNC20:D label20,Ri
*BN20:D label20,Ri
*BP20:D label20,Ri
*BV20:D label20,Ri
*BNV20:D label20,Ri
*BLT20:D label20,Ri
*BGE20:D label20,Ri
*BLE20:D label20,Ri
*BGT20:D label20,Ri
*BLS20:D label20,Ri
*BHI20:D label20,Ri
References :
1. CALL20:D
(1) If label20-PC-2 is between -0x800 and +0x7fe, create an instruction as shown below:
CALL:D label12
(2) If label20-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
LDI:20 #label20,Ri
CALL:D @Ri
2. BRA20
(1) If label20-PC-2 is between -0x100 and +0xfe, create an instruction as shown below:
BRA :D label9
(2) If label20-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
LDI:20 #label20,Ri
JMP:D @Ri
3. Bcc20:D
(1) If label20-PC-2 is between -0x100 and +0xfe, create an instruction as shown below:
Bcc:D label9
(2) If label20-PC-2 is outside the range in (1) or contains an external reference symbol, create an instruction as shown below:
Bxcc false xcc is the opposite condition of cc.
LDI:20 #label20,Ri
JMP:D @Ri
false:
614
Operation
Address of the next instruction
→
label20
PC
→
label20
PC
→
if(Z==1) then label20
PC
↑
s/Z==0
↑
s/C==1
↑
s/C==0
↑
s/N==1
↑
s/N==0
↑
s/V==1
↑
s/V==0
↑
s/V xor N==1
↑
s/V xor N==0
↑
s/(V xor N) or Z==1
↑
s/(V xor N) or Z==0
↑
s/C or Z==1
↑
s/C or Z==0
→
Ri: Temporary register (See Reference 1)
RP,
Ri: Temporary register (See Reference 2)
Ri: Temporary register (See Reference 3)
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
↑
Remarks