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CHAPTER 18 DTP/EXTERNAL INTERRUPT CIRCUIT
18.1
Overview of the DTP/External Interrupt Circuit
The data transfer peripheral (DTP)/external interrupt circuit is located between external
peripherals and the F
requests from peripherals and passes them to the CPU to generate external interrupt
requests or activate the extended intelligent I/O service (EI
■ DTP/external Interrupt Functions
The DTP/external interrupt circuit is activated by the signal supplied to a DTP/external interrupt pin. The
CPU accepts the signal using the same procedure it uses for normal hardware interrupts and generates
external interrupts or activates the extended intelligent I/O service (EI
If the extended intelligent I/O service (EI
CPU, the circuit executes its external interrupt function and branches to an interrupt routine. If EI
enabled, the circuit executes its DTP function, which performs automatic data transfer using EI
branches to an interrupt processing routine after the data transfer has been performed a specified number of
times.
Table 18.1-1 provides an overview of the DTP/external interrupt circuit.
Table 18.1-1 Overview of the DTP/external Interrupt Circuit
Input pins
Eight (P10/INT0/DTTI0 to P16/INT6, P63/INT7)
By using the request level setting register (ELVR), the level or edge to be detected can be selected
for each pin
Interrupt cause
Input of H level or L level or rising edge or
falling edge
#20 (14
Interrupt number
The output of interrupt requests is enabled and disabled using the DTP/interrupt enable register
Interrupt control
(ENIR)
Interrupt flag
Interrupt causes are stored in the DTP/interrupt cause register (EIRR)
Processing selection
EI
The circuit branches to an external interrupt
Processing
processing routine
ICR: Interrupt control register
514
2
MC-16LX CPU. It receives interrupt requests and data transfer
External interrupt function
), #22 (16
), #25 (19
H
H
2
OS is disabled (ICR: ISE = 0)
2
OS) is disabled when an interrupt request is accepted by the
Input of H level or L level
), #27 (1B
)
H
H
2
EI
OS is enabled (ICR: ISE = 1)
The circuit performs automatic data transfer
using EI
and then branches to an interrupt routine
2
OS).
2
OS).
DTP function
2
OS for a specified number of times
2
OS is
2
OS and
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