Fujitsu FR60 Hardware Manual page 154

CHAPTER 3 CPU AND CONTROL UNITS
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Oscillation stabilization wait RUN state
In the oscillation stabilization wait RUN state, the device is stopped. This state occurs after a return from
the stop state.
All internal circuits except the clock generation controller (timebase counter and device state controller) are
stopped. All internal clocks are stopped, but the oscillation circuit and the PLL that has been enabled are
running.
High impedance control of external pins in the stop or other state is cleared.
If the specified oscillation stabilization wait time elapses, the RUN state (normal operation) is entered.
If a settings initialization reset (INIT) request occurs, the settings initialization reset (INIT) state is entered.
If an operation initialization reset (RST) request occurs, the oscillation stabilization wait reset (RST) state
is entered.
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Oscillation stabilization wait reset (RST) status
In the oscillation stabilization wait reset (RST) state, the device is stopped. This state occurs after a return
from the stop state or the settings initialization reset (INIT) state.
All internal circuits except the clock generation controller (timebase counter and device state controller) are
stopped. All internal clocks are stopped, but the oscillation circuit and the PLL that has been enabled are
running.
High impedance control of external pins in the stop state, etc., is cleared.
An operation initialization reset (RST) is outputted to the internal circuits.
If the specified oscillation stabilization wait time elapses, the oscillation stabilization wait reset (RST) state
is entered.
If a settings initialization reset (INIT) request occurs, the settings initialization reset (INIT) state is entered.
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Operation initialization reset (RST) state
In the operation initialization reset (RST) state, a program is initialized. This state occurs if an operation
initialization reset (RST) request is accepted or the oscillation stabilization wait reset (RST) state is ended.
Execution of a program on the CPU is stopped and the program counter is initialized. Most peripheral
circuits are initialized. All internal clocks, the oscillation circuit and the PLL that has been enabled are
running.
An operation initialization reset (RST) is outputted to the internal circuits.
If an operation initialization reset (RST) request no longer exists, the RUN state (normal operation) is
entered and the operation initialization reset sequence is executed. After a return from the settings
initialization reset (INIT), the settings initialization reset sequence is executed.
If a settings initialization reset (INIT) request occurs, the settings initialization reset (INIT) state is entered.
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