Fujitsu FR60 Hardware Manual page 211

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Table of Contents

■ External Bus Access

For big endian ordering for external bus access, the following items are arranged as illustrated later for bus

widths of 16 and 8 bits and for word, halfword, and byte access:

Access byte location

Program address and output address

Bus access count

Output A1/A0

The FR family does not detect misalignment errors.

Therefore, for word access, the lower two bits of the output address are always "00" regardless of whether

"00", "01", "10", or "11" is specified as the lower two bits by the program. For halfword access, the lower

two bits of the output address are "00" if the lower two bits specified by the program are "00" or "01", and

are "10" if "10" or "11".

Two low-order bits of the address specified by the program

Two low-order bits of the output address

Location of initial byte of the output address

Data byte location to be accessed

Bus access count

Mb91350a series