Fujitsu FR60 Hardware Manual page 622

APPENDIX
■ Addressing Mode Symbols
Table D-1 explains the addressing mode symbols.
Table D-1 Explanation of Addressing Mode Symbols
Symbol
Ri
Rj
R13
Ps
Rs
Cri
CRj
#i8
#i20
#i32
#s5
#s10
#u4
#u5
#u8
#u10
@dir8
@dir9
@dir10
label9
label12
label20
label32
@Ri
@Rj
@(R13,Rj)
@(R14,disp10)
@(R14,disp9)
@(R14,disp8)
@(R15,udisp6)
@Ri+
@R13+
@SP+
@-SP
(reglist)
604
Register direct (R0 to R15, AC, FP, SP)
Register direct (R0 to R15, AC, FP, SP)
Register direct (R13, AC)
Register direct (program status register)
Register direct (TBR, RP, SSP, USP, MDH, MDL)
Register direct (CR0 to CR15)
Register direct (CR0 to CR15)
Unsigned 8-bit immediate (-128 to 255)
Note: -128 to -1 is handled as 128 to 255.
Unsigned 20-bit immediate (-0X80000 to 0XFFFFF)
Note: -0X7FFFF to -1 is handled as 0X7FFFF to 0XFFFFF.
Unsigned 32-bit immediate (-0X80000000 to 0XFFFFFFFF)
Note: -0X80000000 to -1 is handled as 0X80000000 to 0XFFFFFFFF.
Signed 5-bit immediate (-16 to 15)
Signed 10-bit immediate (-512 to 508, multiples of 4 only)
Unsigned 4-bit immediate (0 to 15)
Unsigned 5-bit immediate (0 to 31)
Unsigned 8-bit immediate (0 to 255)
Unsigned 10-bit immediate (0 to 1020, multiples of 4 only)
Unsigned 8-bit direct address (0 to 0XFF)
Unsigned 9-bit direct address (0 to 0X1FE, multiple of 2 only)
Unsigned 10-bit direct address (0 to 0X3FC, multiples of 4 only)
Signed 9-bit branch address (-0X100 to 0XFC, multiples of 2 only)
Signed 12-bit branch address (-0X800 to 0X7FC, multiples of 2 only)
Signed 20-bit branch address (-0X80000 to 0X7FFFF)
Signed 32-bit branch address (-0X80000000 to 0X7FFFFFFF)
Register indirect (R0 to R15, AC, FP, SP)
Register indirect (R0 to R15, AC, FP, SP)
Register relative indirect (RjR0 to R15, AC, FP, SP)
Register relative indirect (disp10: -0X200 to 0X1FC, multiples of 4 only)
Register relative indirect (disp9: -0X100 to 0XFE multiples of 2 only)
Register relative indirect (disp8: -0X80 to 0X7F)
Register relative indirect (udisp6: 0 to 60, multiples of 4 only)
Register indirect with post-increment (R0 to R15, AC, FP, SP)
Register indirect with post-increment (R13, AC)
Stack pop
Stack push
Register list
Meaning