Fujitsu FR60 Hardware Manual page 348

CHAPTER 9 INTERRUPT CONTROLLER
Table 9.2-1 Correspondence Between Possible Interrupt Level Setting Bits and Interrupt
ICR4
0
0
0
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
1
*: ICR4 is always 1; 0 cannot be written to this bit.
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Levels
* ICR3 ICR2 ICR1
0 0
1 1
1 1
0 0
0 0
0 0
0 0
0 1
0 1
0 1
0 1
1 0
1 0
1 0
1 0
1 1
1 1
1 1
1 1
ICR0
0 0 0
1 0 14
1 1 15
0 0 16
0 1 17
1 0 18
1 1 19
0 0 20
0 1 21
1 0 22
1 1 23
0 0 24
0 1 25
1 0 26
1 1 27
0 0 28
0 1 29
1 0 30
1 1 31
Interrupt level
Reserved for system
NMI
Maximum level that can be set
(High)
(Low)
Interrupt disabled