Fujitsu FR60 Hardware Manual page 440

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CHAPTER 14 UART, SERIAL I/O INTERFACE (SIO), INPUT CAPTURE MODULE, AND OUTPUT COMPARE

Figure 14.2-4 Shift Operation Start/stop Timing (Internal Clock)

SCK5 to SCK7

Figure 14.2-5 shows the timing of starting and stopping the shift operation in LSB-first mode based on the

external clock.

Figure 14.2-5 Shift Operation Start/Stop Timing (External Clock) (LSB First)

SCK5 to SCK7

Figure 14.2-6 shows the timing of starting and stopping the shift operation for each instruction in external

shift clock mode.

Figure 14.2-6 Shift Operation Start/Stop Timing (External Shift Clock Mode with Instruction Shift)

SCK5 to SCK7

In the instruction shift, when "1" is written to the bit corresponding to SCK of PDR, "H" is outputted.

When "0" is written to this bit, "L" is outputted (however, in the case of SCOE=0 at the external shift

clock mode selection).

(Transfer start)

(Transfer start)

SCK="0" in PDR

(Transfer end)

SCK="1" in PDR (Transfer end)

DO7 (Data maintained)

(Transfer end)

DO7 (Data maintained)

SCK="0" in PDR

DO7 (Data maintained )

Mb91350a series