Fujitsu FR60 Hardware Manual page 415

[Bit 2] BDS (Bit Direction Select)
This bit selects the transfer direction.
Value
Note:
Because the high-order and low-order data are switched when the serial data register is written to or
read, the data will become invalid if the bit is rewritten after data is written to the SDR register. If the
SODR register and BDS are rewritten at the same time using halfwords (16 bits), data will be written
to the SODR register based on the BDS value before rewriting.
[Bit 1] RIE (Receiver Interrupt Enable)
This bit controls a reception interrupt.
Value
Note:
Receive interrupt sources include errors due to PE, ORE, and FRE as well as normal receive due to
RDRF.
[Bit 0] TIE (Transmitter Interrupt Enable)
This bit controls send interrupt.
Value
Note:
Send interrupt sources include send requests due to TDRE.
0 Sends starting from the least significant bit (LSB). [initial value]
1 Sends starting from the most significant bit (MSB).
0 Disables receive interrupt. [initial value]
1 Enables receive interrupt.
0 Disables send interrupt.
1 Enables send interrupt.
Meaning
Meaning
Meaning
[initial value]
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