Fujitsu FR60 Hardware Manual page 39

Table 1.5-1 Pin Functions (9 / 13)
Pin number
176 pins 120 pins
132 -
133 -
134 51
135 61
137 60
138 to 140 52 to 54
141 58
143 57
144 55
147 -
148 -
I/O
Pin name circuit
type
SO5
D
PG4
SCK5
D
PG5
NMI H
X1A B
X0A B
H
MD2 to MD0
J
X0 A
X1 A
INIT I
DREQ2
C
PC0
DACK2
C
PC1
Function
[SO5] is data output from serial I/O5.
This function is valid when serial I/O5 data output is
allowed.
[PG4] is a general-purpose I/O port.
This function is valid when serial I/O5 data output is not
allowed.
[SCK5] is clock I/O for serial I/O5.
This function is valid when serial I/O5 clock output is
allowed or when external shift clock input is used.
[PG5] is a general-purpose I/O port.
This function is valid when serial I/O5 clock output is not
allowed or when external clock input is not used.
NMI (non-maskable interrupt) input
Clock (oscillation) output (subclock)
Clock (oscillation) input (subclock)
[MD2 to MD0] are mode pins 2 to 0.
These pins set the basic operating mode. Connect the pins to
V or V .
CC SS
Input circuit type:
• The production version (mask ROM version) is the "H"
type.
• The flash ROM version is the "J" type.
Clock (oscillation) input (main clock)
Clock (oscillation) output (main clock)
External reset input
[DREQ2] is DMA external transfer request input.
Since this input is always used when it is selected as the
source of DMA activation, output using the port must be
stopped beforehand unless this operation is the intended
operation.
[PC0] is a general-purpose I/O port.
[DACK2] is DMA external transfer request acceptance
output.
This function is valid when DMA transfer request
acceptance output is allowed.
[PC1] is a general-purpose I/O port.
This function is valid when DMA transfer request
acceptance output is allowed.
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