Fujitsu FR60 Hardware Manual page 133

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[Bit 6] SLEEP (SLEEP mode)

This bit specifies entry into sleep mode. If "1" is written to both Bit 7 (STOP bit) and this bit, this bit

(STOP) has precedence and the device enters stop mode.

Sleep mode not entered (initial value)

Sleep mode entered

This bit is initialized to "0" by a reset (RST) and by a sleep return source.

This bit is readable and writable.

[Bit 5] HIZ (HIZ mode)

This bit controls the pin state in stop mode.

The pin state before stop mode entered is maintained.

Pin output is set to high-impedance state in stop mode (initial value).

This bit is initialized to "0" by a reset (INIT).

This bit is readable and writable.

[Bit 4] SRST (Software ReSeT)

This bit specifies issuing of a software reset (RST).

A software reset is issued.

A software reset is not issued (initial value).

This bit is initialized to "1" by a reset (RST).

This bit is readable and writable. The read value is always "1".

Mb91350a series