Retry Timer Setting Register (Hrtimer) - Fujitsu F2MC-16LX Hardware Manual

CHAPTER 14 USB Mini-HOST
14.4.6

Retry Timer Setting Register (HRTIMER)

The retry timer setting register (HRTIMER) is a register used to set a retry time period
for a token.
Retry Timer Setting Register (HRTIMER)
Figure 14.4-6 Bit Configuration of Retry Timer Setting Register (HRTIMER)
Retry timer setting register
Address: 0000C6
H
→
Read/Write
→
Initial value
Reset On/Off at UDCC RST bit →
Address: 0000C7
H
→
Read/Write
→
Initial value
Reset On/Off at UDCC RST bit →
Address: 0000C8
H
→
Read/Write
→
Initial value
Reset On/Off at UDCC RST bit →
[bit 23 to bit 18] Reserved
There are reserved bits.
The reading is irregular. The writing does not influence the operation.
[bit 17 to bit 0] HRTIMER0, HRTIMER1, HRTIMER2
These bits set a time to retry a token. When the RETRY bit of the host control register (HCNT1) is "1",
a retry timer is activated after the token is started, and the timer is decremented by "1" due to 1-bit
transfer clock (12 MHz at Full Speed). When the retry timer becomes "0", token retry dose not execute.
When the token retry occurs in an EOF area, the retry timer stops until the SOF is completed. The timer
value that was stopped is decremented by 1 after the SOF is executed. It is not initialized with the RST
bit in the UDC control register (UDCC). To update them, you must set the RST bit in the UDC control
register (UDCC) to "0".
330
7 6 5
15 14 13
7(23) 6(22) 5(21)
Reserved
4 3
RTIMER0
(R/W)
(00000000 )
B
( )
12 11 10
RTIMER1
(R/W)
(00000000 )
B
( )
4(20) 3(19) 2(18)
(-)
(x)
(-)
2 1 0
9 8
1(17) 0(16)
RTIMER2
(R/W)
(00)
( )
←
bit number
HRTIMER
←
bit number
HRTIMER
←
bit number
HRTIMER