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CHAPTER 13 16-BIT PPG TIMER
13.4.3
PPG Duty Setting Buffer Register (PDUT0 to PDUT2)
PPG duty setting buffer register is used to control the duty ratio of the output pulses
generated by PPG.
■ PPG Duty Setting Buffer Register (PDUT0 to PDUT2)
Figure 13.4-4 PPG Duty Setting Buffer Register (PDUT0 to PDUT2)
PPG Duty Setting Buffer Register (Upper)
Address: ch.0 00003D
ch.1 000045
ch.3 00004D
Read/write
Initial value
PPG Duty Setting Buffer Register (Lower)
Address: ch.0 00003C
ch.1 000044
ch.3 00004C
Read/write
Initial value
These are 16-bit registers that are used to control the duty ratio of the output pulses generated by PPG. The
initial value of them are undetermined, so that these registers must be set a value before starting an
operation. Word access instruction to these registers are recommended. These registers are write-only.
Data transfer from duty setting buffer register to duty setting register is at counter borrow or trigger or
retrigger if enabled.
Setting the same value in both the period setting register and duty setting register outputs all "H"s for
normal polarity and all "L"s for inverted polarity.
The output of the PPG is indeterminate if PCSR < PDUT.
Note:
Duty setting buffer register can be written in the case of not updating period setting buffer register.
266
bit
15
14
H
H
DU15
DU14
DU13 DU12
H
W
W
W
X
X
X
bit
7
6
H
H
DU15
DU14
DU13 DU12
H
W
W
X
X
13
12
11
10
DU11
DU10
W
W
W
X
X
X
5
4
3
DU11
DU10
W
W
W
W
X
X
X
X
9
8
PDUT0 to
DU09
DU08
PDUT2
W
W
X
X
2
1
0
PDUT0 to
DU09
DU08
PDUT2
W
W
X
X
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