ST STM32F40 Series Reference Manual page 1231

USB on-the-go high-speed (OTG_HS)
OTG_HS device each endpoint interrupt register mask
(OTG_HS_DEACHINTMSK)
Address offset: 0x083C
Reset value: 0x0000 0000
There is one interrupt bit for endpoint 1 IN and one interrupt bit for endpoint 1 OUT.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Reserved
Bits 31:18 Reserved, must be kept at reset value.
Bit 17 OEP1INTM: OUT Endpoint 1 interrupt mask bit
Bits 16:2
Bit 1 IEP1INTM: IN Endpoint 1 interrupt mask bit
Bit 0
OTG_HS device each in endpoint-1 interrupt register
(OTG_HS_DIEPEACHMSK1)
Address offset: 0x844
Reset value: 0x0000 0000
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
Bits 31:14 Reserved, must be kept at reset value.
Bit 13 NAKM: NAK interrupt mask
Bit 12:10 Reserved, must be kept at reset value.
Bit 9 BIM: BNA interrupt mask
Bit 8 TXFURM: FIFO underrun mask
Bit 7 Reserved, must be kept at reset value.
1231/1422
Reserved, must be kept at reset value.
Reserved, must be kept at reset value.
Reserved
0: Masked interrupt
1: unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
0: Masked interrupt
1: Unmasked interrupt
Doc ID 018909 Rev 4
9 8 7
Reserved
9 8 7
rw rw rw
RM0090
6 5 4 3 2 1 0
6 5 4 3 2 1 0
rw rw rw rw rw rw