Main Etm Registers; Configuration Example; Mcu Debug Component (Dbgmcu); Debug Support For Low-Power Modes - ST STM32F40 Series Reference Manual

Debug support (DBG)
33.15.3

Main ETM registers

For more information on registers refer to the chapter 3 of the ARM IHI 0014N specification.

Table 234. Main ETM registers

Address
0xE0041FB0 ETM Lock Access
0xE0041000 ETM Control
0xE0041010 ETM Status
0xE0041008 ETM Trigger Event
0xE004101C
0xE0041020 ETM Trace Enable Event
0xE0041024 ETM Trace Start/Stop
33.15.4

Configuration example

To output a simple value to the TPIU:
●
Configure the TPIU and enable the I/IO_TRACEN to assign TRACE I/Os in the
STM32F4xxdebug configuration register.
●
Write 0xC5ACCE55 to the ETM Lock Access Register to unlock the write access to the
ITM registers
●
Write 0x00001D1E to the control register (configure the trace)
● Write 0000406F to the Trigger Event register (define the trigger event)
●
Write 0000006F to the Trace Enable Event register (define an event to start/stop)
● Write 00000001 to the Trace Start/stop register (enable the trace)
●
Write 0000191E to the ETM Control Register (end of configuration)
33.16

MCU debug component (DBGMCU)

The MCU debug component helps the debugger provide support for:
●
Low-power modes
●
Clock control for timers, watchdog, I2C and bxCAN during a breakpoint
●
Control of the trace pins assignment
33.16.1

Debug support for low-power modes

To enter low-power mode, the instruction WFI or WFE must be executed.
The MCU implements several low-power modes which can either deactivate the CPU clock
or reduce the power of the CPU.
1395/1422
Register
ETM Trace Enable
Control
Doc ID 018909 Rev 4
Write 0xC5ACCE55 to unlock the write access to the
other ETM registers.
This register controls the general operation of the ETM,
for instance how tracing is enabled.
This register provides information about the current status
of the trace and trigger logic.
This register defines the event that will control trigger.
This register defines which comparator is selected.
This register defines the trace enabling event.
This register defines the traces used by the trigger source
to start and stop the trace, respectively.
Details
RM0090