ST STM32F40 Series Reference Manual page 1074

RM0090
OTG_FS Host frame number/frame time remaining register (OTG_FS_HFNUM)
Address offset: 0x408
Reset value: 0x0000 3FFF
This register indicates the current frame number. It also indicates the time remaining (in
terms of the number of PHY clocks) in the current frame.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
r r r r r r r
Bits 31:16 FTREM: Frame time remaining
Bits 15:0 FRNUM: Frame number
OTG_FS_Host periodic transmit FIFO/queue status register
(OTG_FS_HPTXSTS)
Address offset: 0x410
Reset value: 0x0008 0100
This read-only register contains the free space information for the periodic TxFIFO and the
periodic transmit request queue.
31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16 15 14 13 12 11 10
PTXQTOP
r r r r r r r
Bits 31:24 PTXQTOP: Top of the periodic transmit request queue
This indicates the entry in the periodic Tx request queue that is currently being processed by
the MAC.
This register is used for debugging.
Bit 31: Odd/Even frame
Bits 30:27: Channel/endpoint number
Bits 26:25: Type
Bit 24: Terminate (last entry for the selected channel/endpoint)
FTREM
r r r r r r
Indicates the amount of time remaining in the current frame, in terms of PHY clocks. This
field decrements on each PHY clock. When it reaches zero, this field is reloaded with the
value in the Frame interval register and a new SOF is transmitted on the USB.
This field increments when a new SOF is transmitted on the USB, and is cleared to 0 when
it reaches 0x3FFF.
PTXQSAV
r r r r r r
– 0: send in even frame
– 1: send in odd frame
– 00: IN/OUT
– 01: Zero-length packet
– 11: Disable channel command
Doc ID 018909 Rev 4
r r r r r r r
r r r rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw rw
USB on-the-go full-speed (OTG_FS)
9 8 7 6 5
FRNUM
r r r r r r r
9 8 7 6 5
PTXFSAVL
4 3 2 1 0
r r r r r
4 3 2 1 0
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