Figure 374. Processing A Setup Packet - ST STM32F40 Series Reference Manual

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USB on-the-go full-speed (OTG_FS)

Figure 374. Processing a SETUP packet

Handling more than three back-to-back SETUP packets
Per the USB 2.0 specification, normally, during a SETUP packet error, a host does not send
more than three back-to-back SETUP packets to the same endpoint. However, the USB 2.0
specification does not limit the number of back-to-back SETUP packets a host can send to
the same endpoint. When this condition occurs, the OTG_FS controller generates an
interrupt (B2BSTUP in OTG_FS_DOEPINTx).
Setting the global OUT NAK
Internal data flow:
1.
When the application sets the Global OUT NAK (SGONAK bit in OTG_FS_DCTL), the
core stops writing data, except SETUP packets, to the receive FIFO. Irrespective of the
space availability in the receive FIFO, non-isochronous OUT tokens receive a NAK
handshake response, and the core ignores isochronous OUT data packets
2.
The core writes the Global OUT NAK pattern to the receive FIFO. The application must
reserve enough receive FIFO space to write this data pattern.
3.
When the application pops the Global OUT NAK pattern Word from the receive FIFO,
the core sets the GONAKEFF interrupt (OTG_FS_GINTSTS).
4.
Once the application detects this interrupt, it can assume that the core is in Global OUT
NAK mode. The application can clear this interrupt by clearing the SGONAK bit in
OTG_FS_DCTL.
Application programming sequence
1137/1422
Wait for STUP in OTG_FS_DOEPINTx
rem_supcnt =
rd_reg(DOEPTSIZx)
setup_cmd[31:0] = mem[4 – 2 * rem_supcnt]
setup_cmd[63:32] = mem[5 – 2 * rem_supcnt]
Find setup cmd type
Read
ctrl-rd/wr/2 stage
setup_np_in_pkt
setup_np_in_pkt
Data IN phase
Status IN phase
Doc ID 018909 Rev 4
Write
2-stage
rcv_out_pkt
Data OUT phase
RM0090
ai15678

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