Flexible static memory controller (FSMC)
Table 195. FSMC_BCRx bit fields (continued)
Bit
number
3-2
1
0
Table 196. FSMC_BTRx bit fields
Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
1329/1422
Bit name
MTYP
As needed, exclude 0x2 (NOR Flash)
MUXE
0x0
MBKEN
0x1
Bit name
Reserved
0x0
ACCMOD
0x0
DATLAT
Don't care
CLKDIV
Don't care
BUSTURN
Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
DATAST
write accesses, DATAST HCLK cycles for read accesses).
ADDHLD
Don't care
Duration of the first access phase (ADDSET HCLK cycles).
ADDSET
Minimum value for ADDSET is 0.
Doc ID 018909 Rev 4
Value to set
Value to set
RM0090
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