ST STM32F40 Series Reference Manual page 1353

Flexible static memory controller (FSMC)
Bits 3:2 MTYP: Memory type.
Bit 1 MUXEN: Address/data multiplexing enable bit.
Bit 0 MBKEN: Memory bank enable bit.
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Defines the type of external memory attached to the corresponding memory bank:
00: SRAM, ROM (default after reset for Bank 2...4)
01: PSRAM (Cellular RAM: CRAM)
10: NOR Flash/OneNAND Flash (default after reset for Bank 1)
11: reserved
When this bit is set, the address and data values are multiplexed on the databus, valid
only with NOR and PSRAM memories:
0: Address/Data nonmultiplexed
1: Address/Data multiplexed on databus (default after reset)
Enables the memory bank. After reset Bank1 is enabled, all others are disabled.
Accessing a disabled bank causes an ERROR on AHB bus.
0: Corresponding memory bank is disabled
1: Corresponding memory bank is enabled
Doc ID 018909 Rev 4
RM0090