Debug Mcu Apb1 Freeze Register (Dbgmcu_Apb1_Fz) - ST STM32F40 Series Reference Manual

RM0090
33.16.4

Debug MCU APB1 freeze register (DBGMCU_APB1_FZ)

The DBGMCU_APB1_FZ register is used to configure the MCU under Debug. It concerns
APB1 peripherals. It is mapped on the external PPB bus at address 0xE004 2008.
The register is asynchronously reset by the POR (and not the system reset). It can be
written by the debugger under system reset.
Address : 0xE004 2008
Only 32-bits access are supported.
Power on reset (POR): 0x0000 0000 (not reset by system reset)
31 30 29
Reserved
15 14 13
Reserved
Bits 31:27 Reserved, must be kept at reset value.
Bit 26 DBG_CAN2_STOP: Debug CAN2 stopped when Core is halted
0: Same behavior as in normal mode
1: The CAN2 receive registers are frozen
Bit 25 DBG_CAN1_STOP: Debug CAN2 stopped when Core is halted
0: Same behavior as in normal mode
1: The CAN2 receive registers are frozen
Bit 24 Reserved, must be kept at reset value.
Bit 23 DBG_I2C3_SMBUS_TIMEOUT: SMBUS timeout mode stopped when Core is halted
0: Same behavior as in normal mode
1: The SMBUS timeout is frozen
Bit 22 DBG_I2C2_SMBUS_TIMEOUT: SMBUS timeout mode stopped when Core is halted
0: Same behavior as in normal mode
1: The SMBUS timeout is frozen
Bit 21 DBG_I2C1_SMBUS_TIMEOUT: SMBUS timeout mode stopped when Core is halted
0: Same behavior as in normal mode
1: The SMBUS timeout is frozen
28 27 26 25
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12 11 10 9
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Doc ID 018909 Rev 4
24 23 22 21
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8 7 6 5
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Debug support (DBG)
20 19 18 17
Reserved
4 3 2 1
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1398/1422
16
0
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