Figure 377. A-Device Srp - ST STM32F40 Series Reference Manual

USB on-the-go full-speed (OTG_FS)

Figure 377. A-device SRP

DRV_VBUS
VBUS_VALID
A_VALID
D+
D-
1. DRV_VBUS = V
VBUS_VALID = V
A_VALID = A-peripheral V
D+ = Data plus line
D- = Data minus line
1. To save power, the application suspends and turns off port power when the bus is idle
by writing the port suspend and port power bits in the host port control and status
register.
2. PHY indicates port power off by deasserting the VBUS_VALID signal.
3. The device must detect SE0 for at least 2 ms to start SRP when V
4. To initiate SRP, the device turns on its data line pull-up resistor for 5 to 10 ms. The
OTG_FS controller detects data-line pulsing.
5. The device drives V
pulsing.
The OTG_FS controller interrupts the application on detecting SRP. The Session
request detected bit is set in Global interrupt status register (SRQINT set in
OTG_FS_GINTSTS).
6. The application must service the Session request detected interrupt and turn on the
port power bit by writing the port power bit in the host port control and status register.
The PHY indicates port power-on by asserting the VBUS_VALID signal.
7. When the USB is powered, the device connects, completing the SRP process.
1153/1422
Suspend
1
2
3
Low
drive signal to the PHY
BUS
valid signal from PHY
BUS
level signal to PHY
BUS
above the A-device session valid (2.0 V minimum) for V
BUS
Doc ID 018909 Rev 4
6
V
BUS
4
Data line pulsing
RM0090
5
pulsing
7
Connect
ai15681
power is off.
BUS
BUS