Table 204. Fsmc_Btrx Bit Fields; Table 205. Fsmc_Bwtrx Bit Fields - ST STM32F40 Series Reference Manual

Flexible static memory controller (FSMC)
Table 203. FSMC_BCRx bit fields (continued)
Bit No.
1
0

Table 204. FSMC_BTRx bit fields

Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0

Table 205. FSMC_BWTRx bit fields

Bit
number
31:30
29-28
27-24
23-20
19-16
15-8
7-4
3-0
1337/1422
Bit name
MUXEN 0x0
MBKEN 0x1
Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT 0x0
CLKDIV 0x0
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
DATAST
write accesses, DATAST HCLK cycles for read accesses).
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles).
ADDSET
Minimum value for ADDSET is 0.
Bit name
Reserved 0x0
ACCMOD 0x2
DATLAT Don't care
CLKDIV Don't care
BUSTURN Time between NEx high to NEx low (BUSTURN HCLK)
Duration of the second access phase (DATAST+1 HCLK cycles for
DATAST
write accesses,
ADDHLD Don't care
Duration of the first access phase (ADDSET HCLK cycles).
ADDSET
Minimum value for ADDSET is 0.
Doc ID 018909 Rev 4
Value to set
Value to set
Value to set
RM0090