RM0090
Table 213. FSMC_BCRx bit fields (continued)
Bit No.
10
9
8
7
6
5-4
3-2
1
0
Table 214. FSMC_BTRx bit fields
Bit No.
31:30
29:28
27-24
23-20
19-16
15-8
7-4
3-0
Bit name
WRAPMOD
0x0
WAITPOL
to be set according to memory
BURSTEN
no effect on synchronous write
Reserved
0x1
FACCEN
Set according to memory support
MWID
As needed
MTYP
0x1
MUXEN
As needed
MBKEN
0x1
Bit name
Reserved
0x0
ACCMOD
0x0
DATLAT
Data latency
0x0 to get CLK = HCLK (not supported)
CLKDIV
0x1 to get CLK = 2 × HCLK
BUSTURN
Don't care
DATAST
Don't care
ADDHLD
Don't care
ADDSET
Don't care
Doc ID 018909 Rev 4
Flexible static memory controller (FSMC)
Value to set
Value to set
1350/1422
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