Table 203. Fsmc_Bcrx Bit Fields; Figure 413. Mode C Write Accesses - ST STM32F40 Series Reference Manual

RM0090

Figure 413. Mode C write accesses

The differences compared with mode1 are the toggling of NOE and the independent read
and write timings.

Table 203. FSMC_BCRx bit fields

Bit No.
31-20
19
18:16
15
14
13
12
11
10
9
8
7
6
5-4
3-2
A[25:0]
NADV
NEx
NOE
NWE
D[15:0]
HCLK cycles
Bit name
Reserved
CBURSTRW
Reserved
ASYNCWAIT
EXTMOD
WAITEN
WREN
WAITCFG
WRAPMOD
WAITPOL
BURSTEN
Reserved
FACCEN
MWID
MTYP
Doc ID 018909 Rev 4
Flexible static memory controller (FSMC)
Memory transaction
data driven by FSMC
ADDSET
0x000
0x0 (no effect on asynchronous mode)
0x0
Set to 1 if the memory supports this feature. Otherwise keep
at 0.
0x1
0x0 (no effect on asynchronous mode)
0x1
As needed
0x0
Meaningful only if bit 15 is 1
0x0
0x1
0x1
As needed
0x2 (NOR Flash memory)
1HCLK
(DATAST + 1)
HCLK cycles
Value to set
ai15565
1336/1422