ST STM32F40 Series Reference Manual page 1215

USB on-the-go high-speed (OTG_HS)
Bits 21:20 MC: Multi Count (MC) / Error Count (EC)
– When the split enable bit (SPLITEN) in the host channel-x split control register
– When the SPLITEN bit is set (1) in OTG_HS_HCSPLTx, this field indicates the number of
Bits 19:18 EPTYP: Endpoint type
Bit 17 LSDEV: Low-speed device
Bit 16 Reserved, must be kept at reset value.
Bit 15 EPDIR: Endpoint direction
Indicates whether the transaction is IN or OUT.
Bits 14:11 EPNUM: Endpoint number
Bits 10:0 MPSIZ: Maximum packet size
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(OTG_HS_HCSPLTx) is reset (0), this field indicates to the host the number of transactions
that must be executed per micro-frame for this periodic endpoint. For nonperiodic transfers,
this field specifies the number of packets to be fetched for this channel before the internal
DMA engine changes arbitration.
00: Reserved This field yields undefined results
01: 1 transaction
b10: 2 transactions to be issued for this endpoint per micro-frame
11: 3 transactions to be issued for this endpoint per micro-frame.
immediate retries to be performed for a periodic split transaction on transaction errors. This
field must be set to at least 01.
Indicates the transfer type selected.
00: Control
01: Isochronous
10: Bulk
11: Interrupt
This field is set by the application to indicate that this channel is communicating to a low-
speed device.
0: OUT
1: IN
Indicates the endpoint number on the device serving as the data source or sink.
Indicates the maximum packet size of the associated endpoint.
Doc ID 018909 Rev 4
RM0090