Id Codes And Locking Mechanism; Mcu Device Id Code; Boundary Scan Tap; Cortex™-M4F Tap - ST STM32F40 Series Reference Manual

RM0090
33.6

ID codes and locking mechanism

There are several ID codes inside the STM32F4xx MCUs. ST strongly recommends tools
designers to lock their debuggers using the MCU DEVICE ID code located in the external
PPB memory map at address 0xE0042000.
33.6.1

MCU device ID code

The STM32F4xx MCUs integrate an MCU ID code. This ID identifies the ST MCU part-
number and the die revision. It is part of the DBG_MCU component and is mapped on the
external PPB bus (see
JTAG debug port (4 to 5 pins) or the SW debug port (two pins) or by the user software. It is
even accessible while the MCU is under system reset.
DBGMCU_IDCODE
Address: 0xE004 2000
Only 32-bits access supported. Read-only.
31 30 29 28
r r r
15 14 13 12
Reserved
33.6.2

Boundary scan TAP

JTAG ID code
The TAP of the STM32F4xx BSC (boundary scan) integrates a JTAG ID code equal to
0x06413041.
33.6.3 Cortex™-M4F TAP
The TAP of the ARM Cortex™-M4F integrates a JTAG ID code. This ID code is the ARM
default one and has not been modified. This code is only accessible by the JTAG Debug
Port.
This code is 0x4BA00477 (corresponds to Cortex™-M4F r0p1, see
ARM documentation).
Section 33.16 on page
27 26 25
r r r r
11 10 9
r r r
Bits 31:16 REV_ID(15:0) Revision identifier
This field indicates the revision of the device:
0x1000 = Revision A
0x1001 = Revision Z
Bits 15:12 Reserved, must be kept at reset value.
Bits 11:0 DEV_ID(11:0): Device identifier (STM32F405xx/07xx and STM32F415xx/17xx)
The device ID is 0x413.
Bits 11:0 DEV_ID(11:0): Device identifier (STM32F42xxx and STM32F43xxx)
The device ID is 0x419.
Doc ID 018909 Rev 4
1395). This code is accessible using the
24 23 22 21
REV_ID
r r r r
8 7 6 5
DEV_ID
r r r r
Debug support (DBG)
20 19 18 17
r r r r
4 3 2 1
r r r r
Section 33.2: Reference
1382/1422
16
r
0
r