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R8C/18 Group, R8C/19 Group
10.3
CPU Clock and Peripheral Function Clock
There are a CPU clock to operate the CPU and a peripheral function clock to operate the peripheral
functions. Refer to Figure 10.1 Clock Generation Circuit.
10.3.1
System Clock
The system clock is the clock source for the CPU and peripheral function clocks. Either the main
clock or the on-chip oscillator clock can be selected.
10.3.2
CPU Clock
The CPU clock is an operating clock for the CPU and watchdog timer.
The system clock can be divided by 1 (no division), 2, 4, 8, or 16 to produce the CPU clock. Use the
CM06 bit in the CM0 register and bits CM16 to CM17 in the CM1 register to select the value of the
division.
After reset, the low-speed on-chip oscillator clock divided by 8 provides the CPU clock. When
entering stop mode from high-speed or medium-speed mode, the CM06 bit is set to 1 (Divide-by-8
mode).
10.3.3
Peripheral Function Clock (f1, f2, f4, f8, and f32)
The peripheral function clock is the operating clock for the peripheral functions.
The clock fi (i = 1, 2, 4, 8, and 32) is generated by the system clock divided by i. The clock fi is used
for timers X, Y, Z, and C, the serial interface and the comparator.
When the WAIT instruction is executed after setting the CM02 bit in the CM0 register to 1 (peripheral
function clock stops in wait mode), the clock fi stops.
10.3.4
fRING and fRING128
fRING and fRING128 are operating clocks for the peripheral functions.
fRING runs at the same frequency as the on-chip oscillator clock and can be used as the source for
the timer X. fRING128 is generated from fRING by dividing it by 128, and it can be used as timer C.
When the WAIT instruction is executed, the clocks fRING and fRING128 do not stop.
10.3.5
fRING-fast
fRING-fast is used as the count source for timer C. fRING-fast is generated by the high-speed on-
chip oscillator and supplied by setting the HRA00 bit to 1.
When the WAIT instruction is executed, the clock fRING-fast does not stop.
10.3.6
fRING-S
fRING-S is an operating clock for the watchdog timer and voltage detection circuit. fRING-S is
supplied by setting the CM14 bit to 0 (low-speed on-chip oscillator on) and uses the clock generated
by the low-speed on-chip oscillator. When the WAIT instruction is executed or in count source protect
mode of the watchdog timer, fRING-S does not stop.
Rev.1.30
Apr 14, 2006
REJ09B0222-0130
Page 62 of 233
10. Clock Generation Circuit
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