Inter-Integrated Circuit (I2C) Interface; I 2 C Introduction; I 2 C Main Features - ST STM32F100 Series Reference Manual

Inter-integrated circuit (I2C) interface

22 Inter-integrated circuit (I2C) interface
Low-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 16 and 32 Kbytes.
Medium-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 64 and 128 Kbytes.
High-density value line devices are STM32F100xx microcontrollers where the flash
memory density ranges between 256 and 512 Kbytes.
This section applies to the whole STM32F100xx family, unless otherwise specified.
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22.1 I C introduction
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I C (inter-integrated circuit) bus Interface serves as an interface between the microcontroller
and the serial I
sequencing, protocol, arbitration and timing. It supports the standard mode (Sm, up to
100 kHz) and Fm mode (Fm, up to 400 kHz).
It may be used for a variety of purposes, including CRC generation and verification, SMBus
(system management bus) and PMBus (power management bus).
Depending on specific device implementation DMA capability can be available for reduced
CPU overload.
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22.2 I C main features
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Parallel-bus/I
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Multimaster capability: the same interface can act as Master or Slave
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I C Master features:
–
–
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I C Slave features:
–
–
–
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Generation and detection of 7-bit/10-bit addressing and General Call
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Supports different communication speeds:
–
–
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Analog noise filter
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Status flags:
–
–
–
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Error flags:
566/709
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C bus. It provides multimaster capability, and controls all I
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C protocol converter
Clock generation
Start and Stop generation
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Programmable I C Address detection
Dual Addressing Capability to acknowledge 2 slave addresses
Stop bit detection
Standard Speed (up to 100 kHz)
Fast Speed (up to 400 kHz)
Transmitter/Receiver mode flag
End-of-Byte transmission flag
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I C busy flag
RM0041 Rev 6
RM0041
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C bus-specific