Output To Prs - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

32.3.5.2 Level Interrupt Generation
GPIO can generate a level interrupt using the input of any GPIO EM4 wake-up pins on the device. The interrupts have asynchronous
sense capability, enabling wake-up from energy modes as low as EM4.
In order to enable the level interrupt, set the EM4WU field in the GPIO_IEN register and the EM4WUn field in the GPIO_EXTILEVEL
register. Upon a level interrupt occuring, the corresponding EM4WU index in the GPIO_IF register will be set along with the odd or even
interrupt line depending on the index inside of GPIO_IF, see
ity of the level interrupts is based on the settings of the EM4WU field in the GPIO_IEN register and the EM4WUEN field in the
GPIO_EM4WUEN register, see
GPIO_IEN
0
0
1
1
By setting the EM4WU8 in GPIO_EXTILEVEL and EM4WU[8] in GPIO_IEN, the interrupt flag EM4WU[8] in GPIO_IF will be triggered
by a high level on pin EM4WU8 and a interrupt request will be sent on IRQ_GPIO_EVEN.

32.3.6 Output to PRS

All pins within a group of four(0-3,4-7,8-11,12-15) from all ports are grouped together to form one PRS producer which outputs to the
PRS. The pin from which the output should be taken is selected in the same fashion as the edge interrupts.
PRS output is not affected by the interrupt edge detection logic or gated by the IEN bits. See
page 1090 for an illustration of where the PRS output signal is generated.
32.3.7 Synchronization
To avoid metastability in synchronous logic connected to the pins, all inputs are synchronized with double flip-flops. The flip-flops for the
input data run on the HFBUSCLK. Consequently, when a pin changes state, the change will have propagated to GPIO_Px_DIN after
two 2 HFBUSCLK cycles. Synchronization (also running on the HFBUSCLK) is also added for interrupt input. To save power when the
external interrupts or level interrupts are not used, the synchronization flip-flops for these can be turned off by clearing INT or
EM4WU,respectively, in GPIO_INSENSE register.
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Figure 32.7 Level Interrupt Example on page 1091
Table 32.3 Level Interrupt Energy Mode Wakeup on page 1091
Table 32.3. Level Interrupt Energy Mode Wakeup
GPIO_EM4WUEN
0
1
0
1
Figure 32.7. Level Interrupt Example
Reference Manual
GPIO - General Purpose Input/Output
The wake-up granulalr-
Energy Mode Wakeup
No Interrupt
EM4H,EM4S
EM1,EM2,EM3,EM4H,EM4S
EM1,EM2,EM3,EM4H,EM4S
Figure 32.6 Pin N Interrupt Generation on
Rev. 1.1 | 1091