Gpio_Extilevel - External Interrupt Level Register - Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual

32.5.15 GPIO_EXTILEVEL - External Interrupt Level Register

Offset
0x418
Reset
Access
Name
Bit Name
31:29 Reserved
28 EM4WU12
27:26 Reserved
25 EM4WU9
24 EM4WU8
23:21 Reserved
20 EM4WU4
19:18 Reserved
17 EM4WU1
16 EM4WU0
15:0 Reserved
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Reset Access Description
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW EM4 Wake Up Level for EM4WU12 Pin
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW EM4 Wake Up Level for EM4WU9 Pin
0 RW EM4 Wake Up Level for EM4WU8 Pin
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW EM4 Wake Up Level for EM4WU4 Pin
To ensure compatibility with future devices, always write bits to 0. More information in
tions
0 RW EM4 Wake Up Level for EM4WU1 Pin
0 RW EM4 Wake Up Level for EM4WU0 Pin
To ensure compatibility with future devices, always write bits to 0. More information in
tions
GPIO - General Purpose Input/Output
Bit Position
Reference Manual
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
1.2 Conven-
Rev. 1.1 | 1122