Silicon Laboratories EFR32xG14 Wireless Gecko Reference Manual page 1132

followed by a letter). It is possible that different instances of an APORT client connect to different ABUSes. For example, ACMP0
APORT1X might connect to the ABUS BUSAX while ACMP1 APORT1X might connect to ABUS BUSCX. Refer to the APORT Client
Map in the device data sheet to map the generalized APORT client bus name to an actual device ABUS. A given ABUS has multiple
switches which need to be identified. The switches on a bus are specified with the ABUS connection ID followed by a channel ID. For
example, channel switch 7 on a given APORT client might be given as APORT1XCH7. Not all APORT channels map to actual GPIO.
Refer to the APORT Client Maps in the device data sheet for APORT to GPIO mapping.
PF0
PF1
PF2
PF3
PF4
PF5
PF6
PF7
nX, nY APORTnX, APORTnY
AX, BY, ... BUSAX, BUSBY, ...
Figure 33.3 Detailed APORT Structure on page 1132
APORT BUS for the largest package of the EFR32 device family. Note that, in the figure, the BUSxX and BUSxY are annotated as xX
and xY, where x=A,B,C,D and the APORTnX and APORTnY are annotated as nX and nY, where n=1,2,3,4.
For example, the IDAC APORT output 1X can be routed to pin PB14 through BUSCX. The configuration required for this routing is as
follows:
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1X
2X
3X
POS
4X
NEXT1
NEXT0
ACMP0
1Y
2Y
3Y
NEG
4Y
NEXT1
NEXT0
1X
2X
POS
3X
4X
NEXT0
ADC0
1Y
2Y
NEG
3Y
4Y
NEXT1
EXTP
EXTN
OPA0_P
1X 1X
POS
2X
3X
4X
OPA0_N
1Y
NEG
2Y
OPA0
3Y
4Y
OUT0
OUT0ALT
OUT1
OUT
OUT2
OUT3
OUT4
NEXT0
Figure 33.3. Detailed APORT Structure
shows all the possible routes between different peripherals and different pins via
1X 1X
2X
3X
POS
4X
NEXT1
NEXT0
ACMP1
1Y
2Y
3Y
NEG
4Y
NEXT1
NEXT0
1X
IDAC0
1Y
OUT0ALT
OPA0_N
OUT1ALT
OUT0
OPA1_P
1X 1X
OPA0_P
POS
2X
3X
4X
OUT1ALT
ADC_EXTP
OPA1_N
1Y
OPA1
NEG
2Y
ADC_EXTN
3Y
4Y
OUT1
OPA1_N
OUT1ALT
OUT1
OUT
OUT2
OUT0ALT
OUT3
OUT4
NEXT1
Reference Manual
APORT - Analog Port
PB15
PB14
PB13
PB12
PB11
PA5
VDAC0_OUT0ALT
PA4
VDAC0_OUT1ALT
PA3
PA2
VDAC0_OUT1ALT
PA1
PA0
PD15
VDAC0_OUT0ALT
Rev. 1.1 | 1132