ST STM32L4+ Series Reference Manual page 1832

Low-power universal asynchronous receiver transmitter (LPUART)
Determining the maximum LPUART baud rate that enables to correctly wake
up the MCU from low-power mode
The maximum baud rate that enables to correctly wake up the MCU from low-power mode
depends on the wakeup time parameter (refer to the device datasheet) and on the LPUART
receiver tolerance (see
deviation).
Let us take the example of OVER8 = 0, M bits = '01', ONEBIT = 0 and BRR [3:0] = 0000.
In these conditions, according to
LPUART receiver tolerance equals 3.41%.
DTRA + DQUANT + DREC + DTCL + DWU < LPUART receiver tolerance
D
WUmax
T
bit Min
where t
If we consider the ideal case where DTRA, DQUANT, DREC and DTCL parameters are at
0%, the maximum value of DWU is 3.41%. In reality, we need to consider at least the
lpuart_ker_ck inaccuracy.
For example, if HSI is used as lpuart_ker_ck, and the HSI inaccuracy is of 1%, then we
obtain:
t
WULPUART
device datasheet).
D
WUmax
T
bit min
As a result, the maximum baud rate that enables to wakeup correctly from low-power
mode is: 1/11.32 µs = 88.36 Kbaud.
51.5 LPUART interrupts
Refer to
Interrupt event
Transmit data register empty
Transmit FIFO Not Full
Transmit FIFO Empty
Transmit FIFO threshold
reached
1832/2301
Section 51.4.8: Tolerance of the LPUART receiver to clock
= t / (11 x T
WULPUART
= = t / (11 x D
WULPUART
is the wakeup time from low-power mode.
WULPUART
= 3 µs (values provided only as examples; for correct values, refer to the
= 3.41% - 1% = 2.41%
= 3 µs/ (11 x 2.41%) = 11.32 µs.
Table 356 for a detailed description of all LPUART interrupt requests.
Table 363. LPUART interrupt requests
Enable
Event
Control
flag
bit
TXE TXEIE
TXFNF TXFNFIE
TXFE TXFEIE
TXFT TXFTIE
Table 361: Tolerance of the LPUART
)
bit Min
)
WUmax
Interrupt clear method
TXE cleared when a data is
written in TDR
TXFNF cleared when TXFIFO
is full.
TXFE cleared when the
TXFIFO contains at least one
data or by setting TXFRQ bit.
TXFT is cleared by hardware
when the TXFIFO content is
less than the programmed
threshold
RM0432 Rev 6
RM0432
receiver, the
Interrupt activated
lpuart_it lpuart_wkup
YES NO
YES NO
YES YES
YES YES