ST STM32WL55JC Reference Manual page 1033

RM0453
33 Tamper and backup registers (TAMP)
33.1 Introduction
20 32-bit backup registers are retained in all low-power modes and also in V
can be used to store sensitive data as their content is protected by an tamper detection
circuit. 3 tamper pins and 4 internal tampers are available for anti-tamper detection. The
external tamper pins can be configured for edge detection, or level detection with or without
filtering.
33.2 TAMP main features
•
20 backup registers:
–
•
3 external tamper detection events.
–
•
4 internal tamper events.
•
Any tamper detection can generate a RTC timestamp event.
•
Any tamper detection can erase the backup registers, SRAM2 and PKA SRAM.
•
Monotonic counter.
the backup registers (TAMP_BKPxR) are implemented in the RTC domain that
remains powered-on by V
External passive tampers with configurable filter and internal pull-up.
Tamper and backup registers (TAMP)
when the V
BAT DD
RM0453 Rev 2
BAT
power is switched off.
mode. They
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